PluginStatsTerosHDL installs statistics
By Teros Technology · VS Code Marketplace · Programming Languages
Powerful toolbox for ASIC/FPGA: state machine viewer, linter, documentation, snippets... and more!
TerosHDL has 165,117 recorded installs on VS Code Marketplace, ranking #1748 of 2,502 tracked listings.
Rating: 4.70 / 5 from 30 ratings
About TerosHDL
Check the full documentation: https://terostechnology.github.io
The goal of TerosHDL is to provide an open source toolbox for HDL devlopers with functionalities commonly used by software developers. The toolbox consist in a bunch of tools and on top of them is the VSCode plugin. Some tools are developed by Teros Technology organization and others come from open source proyects. All the tools are organized in different backends and exposed to the GUI with the plugin.
The toolbox tries to be as much self-contained as possible and simplify the installation process. Features:
- Simulators and tools support: Raptor, Vivado, ModelSim, GHDL, Verilator, Icarus, VCS, Yosys, VUnit, cocotb, Diamond, Icestorm, ISE, Quartus, Radiant, Spyglass, Symbiflow, Trellis, Xcelium... and more!
- Go to definition.
- Hover.
- Hiterachy viewer.
- Dependencies viewer.
- Syntax highlighting.
- Template generator.
- Automatic documentation.
- Verilog/SV schematic viewer.
- Errors linter.
- Style linter: Verible.
- Code formatting.
- State machine viewer.
- State machine designer.
- Code snippets and grammar.
Development
if you want to contribute with a bug fix or new feature implementation you can use the following steps:
- make fork
git clone [FORK URL]cd vscode-terosHDLgit checkout devthis should put you on dev branch where we do developmentnpm install
now you can start coding. Tests can be run using npm run test once you are done you can open a pull request!
Managed by
Sponsor
This project was funded through the NGI Assure Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement No 957073.
<img border=0 src="https://github.com/TerosTechnology/vscode-terosHDL/blob/dev/resources/images/nlnet-fundation-150x150.png?raw=true" width="150" height="150"><img border=0 src="https://github.com/TerosTechnology/vscode-terosHDL/blob/dev/resources/images/logo.png?raw=true" width="400" height="120">
Description from the VS Code Marketplace listing.
- asic
- fpga
- gtkw_wavebin
- gtkw_waveconfig
- keybindings
- lattice constraints
- ldc
- raptor
- snippet
- System Verilog
- systemverilog
- tcl
- tk
- tlv
- TL-Verilog
- Transactional-Level Verilog
- ucf
- ucf constraints
- vcd
- verilog
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Charts
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Adoption over time
7/30/90-day growth
Ranking history
Ratings over time
Listing placement
Listing placement
Listing placement
Listing placement
Filled points are observed values; hollow points come from Internet Archive snapshots of the listing page. Dashed segments span periods with no observations — values between points are not interpolated.
Each band is one page of 20. Installs on a linear scale. Placement is projected from installs, so it can differ from the marketplace's own sort order. Hover a dot to see the listing.
Recent observations
Full history (6)Similar VS Code Marketplace Programming Languages plugins
All 20 TerosHDL alternativesData source
Install counts, average rating, and rating counts come from the public Visual Studio Marketplace gallery API. Installs are cumulative and exclude updates.
Listing: https://marketplace.visualstudio.com/items?itemName=teros-technology.teroshdl. First seen Oct 16, 2026; last successful collection Oct 21, 2026. See the methodology.